Two years ago I finished my Verilog-based chip project MIFARE reader with no little help from my friends. I made translation/modification Shisharin's (see the chuckling man with big books on the photo) FPGA Mifare FLEX600 model to semicustom chip.
In Zelenograd (photo above shows new houses, it's the boom in local real estate market) Angstrem it needed $5000 for such task. Chip was realised in 1592XM4 family with 10 000 gates programming by two layer of aluminium. Family has 100 000 gates matrix too, but it was too much for my project. We run 3 pilot wafers and get near 1000 good chips. Not bad for begining.
At the photo below you see Mr. Simonov, one of the fathers of family 1592XM, with MIFARE reader prototype SBR9 - schitivatel beskontactni radiochastotni, modification number 9 (Russian name) .
What about the chip price? For 5000 gates chip it was 5$ in military ceramic packaged chip.COB will be about 1$.
Sounds good because now I can put away $40 chip set of Altera FPGA FLEX6000+configarotor ROM from my system.
But CSP packages needed badly for Russians chips!
